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this is information on a product in full production. may 2013 docid15013 rev 3 1/19 19 STG4160 low voltage 0.5 ? single spdt switch with break-before-make feature and 15 kv contact esd protection datasheet - production data features ? wide operating voltage range: v cc (opr.) = 1.65 to 4.8 v ? low power dissipation: i cc = 0.2 a (max.) at t a = 85 c ? low on-resistance: ?r on = 0.75 ? (t a = 25 c) at v cc = 2.25 v ?r on = 0.50 ? (t a = 25 c) at v cc = 3.0 v ?r on =0.40 ? (t a = 25 c) at v cc =4.3v ? separate supply voltage for switch and control pins ? latch-up performance exceeds 100 ma per jesd 78, class ii ? esd performance tested on common pin (d pin): ? 15 kv iec 61000-4-2 esd, contact discharge ? 8 kv hbm jesd22 a114-b class ii ? esd performance tested on s1 and s2 pin: 8 kv iec 61000-4-2 esd, contact discharge ? esd performance test on all other pins: ? 4 kv hbm (jesd22 a114-b class ii) ? 400 v machine model (jesd22 a115-a) ? 1500 v charged-device model (jesd22 c101) applications ? mobile phones description the STG4160 device is a high-speed cmos low voltage single analog spdt (single pole dual throw) switch or 2:1 mu ltiplexer/de multiplexer switch fabricated in silicon gate c 2 mos technology. it is designed to operate from 1.65 to 4.8 v, making this device ideal for portable applications. it offers low on-resistance (0.40 ? typ.) at v cc = 4.3 v. the sel inputs are provided to control the switches. the switch s1 is on (connected to the common port d) when the sel input is held high and off (high impedance state exists between the two ports) when the sel is held low. the switch s2 is on (connected to the common port d) when the sel input is held low and off (high impedance state exist between the two ports) when the sel is held high. additional key features are fast switching speed, break-before-make delay time and ultra power consumption. all inputs and outputs are equipped with protection circuits ag ainst static discharge, giving them esd immunity and transient excess voltage. flip chip 8 table 1. device summary order code package packing STG4160bjr flip chip 8 tape and reel www.st.com
contents STG4160 2/19 docid15013 rev 3 contents 1 pin settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.1 pin connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.2 pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 3 maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 4 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 5 test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 6 package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 7 package marking information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 8 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
docid15013 rev 3 3/19 STG4160 pin settings 1 pin settings 1.1 pin connections figure 1. pin connections 1.2 pin description %xpsylhz 7r sylhz 9 / *1' 6 6(/ 9 && *1' 6 6 ' 9 && 6 ' *1' 9 / 6(/ *1' &6 table 2. pin assignment pin number symbol name and function 1 s1 independent channel 2 gnd ground (0 v) 3 s2 independent channel 4v l logic supply voltage 5v cc positive supply voltage 6 sel control 7 d common channel 8 gnd ground (0 v)
logic diagram STG4160 4/19 docid15013 rev 3 2 logic diagram figure 2. functional diagram figure 3. circuit equivalent logic table 3. truth table sel switch s1 switch s2 hon off (1) l off (1) 1. high impedance. on 6(/ 6 6 ' $0 6 6 $0 ' 6(/
docid15013 rev 3 5/19 STG4160 maximum ratings 3 maximum ratings stressing the device above the rating listed in table 4 may cause permanent damage to the device. these are stress ratings only and operation of the device at these or any other conditions above those indicated in table 5 of this specification is not implied. exposure to absolute maximum rating condition s for extended periods may affe ct device reliability. refer also to the stmicroelectronics ? sure program and other relevant quality documents. table 4. absolute maximum ratings symbol parameter value unit v cc supply voltage -0.5 to 5.5 v v l logic supply voltage -0.5 to 5.5 v v i dc input voltage -0.5 to v cc + 0.5 v v ic dc control input voltage -0.5 to v l +5.5 v v o dc output voltage -0.5 to v cc + 0.5 v i ikc dc input diode current on control pin (v sel <0v) -50 ma i ik dc input diode current (v sel <0 v) 50 ma i ok dc output diode current 20 ma i o dc output current 300 ma i op dc output current peak (pulse at 1 ms, 10% duty cycle) 500 ma i cc or i gnd dc v cc or ground current 100 ma p d power dissipation at t a =70 c (1) 1. derate above 70 c by 18.5 mw/c. 500 mw t stg storage temperature -65 to 150 c t l lead temperature (10 sec.) 260 c table 5. recommended operating conditions symbol parameter value unit v cc supply voltage 1.65 to 4.8 v v l logic supply voltage (1) 1. v l pin should not be left floating. 1.65 to v cc v v i input voltage 0 to v cc v v ic control input voltage 0 to v l v v o output voltage 0 to v cc v t op operating temperature -40 to 85 c dt/dv input rise and fall time control input v l = 1.65 to 2.7 v 0 to 20 ns/v v l = 3.0 to 4.8 v 0 to 10
electrical characteristics STG4160 6/19 docid15013 rev 3 4 electrical characteristics table 6. dc specifications symbol parameter v cc (v) v l (v) test conditions value unit t a = 25 c -40 to 85 c min. typ. max. min. max. v ih high level input voltage 1.65 ? 4.3 1.65 ? 1.95 1.25 1.25 v 2.3 ? 2.7 1.75 1.75 3.0 ? 3.6 2.34 2.34 4.3 2.80 2.80 v il low level input voltage 1.65 ? 4.3 1.65 ? 1.95 0.6 0.6 v 2.3 ? 2.7 0.8 0.8 3.0 ? 3.6 1.05 1.05 4.3 1.5 1.5 r on on-resistance 1.8 1.65 ? 4.3 v s = 0 v to v cc i s =100ma 1.5 2.5 3.7 ? 2.25 0.75 1.0 1.3 3 0.50 0.65 0.8 3.7 0.45 0.55 0.7 4.3 0.40 0.5 0.65 ? r on on-resistance match between channels (1) 1.8 1.65 ? 4.3 v s = 0 v to v cc i s =100ma 40 m ? 2.25 20 310 3.7 10 4.3 10 r flat on-resistance flatness (2) 1.8 1.65 ? 4.3 v s = 0 v to v cc i s =100ma 1.0 1.7 2.0 m ? 2.25 300 430 550 3 150 190 270 3.7 140 180 230 4.3 140 180 220 i off sn off state leakage current 4.3 4.3 v s = 0.3 to 4.0 v d = 0.3 to 4.0 -30 30 -300 300 na i on sn on state leakage current 4.3 4.3 v s = 0.3 to 4.0 v d = open -30 30 -300 300 na i d d on state leakage current 4.3 4.3 v s = open v d = 0 to 4.0 -30 30 -300 300 na
docid15013 rev 3 7/19 STG4160 electrical characteristics symbol parameter v cc (v) v l (v) test conditions value unit t a = 25 c -40 to 85 c min. typ. max. min. max. i cc quiescent supply current 1.65?4.3 1.65?4.3 v sel =v cc or gnd -0.05 0.05 -0.2 0.2 ? a i sel sel leakage current 1.65?4.3 1.65?4.3 v sel = 4.3v or gnd -0.2 0.2 -2 2 ? a 1. ? r on = r on(max) - r on(min) . 2. flatness is defined as the difference between the maximum and mi nimum value of on-resistance as measured over the specified a nalog signal ranges. table 6. dc specifications (continued) table 7. ac electrica l characteristics (c l = 35 pf, r l = 50 ? , t r = t f ?? 5ns) symbol parameter test conditions value unit v cc (v) v l (v) t a = 25 c -40 to 85 c min. typ. max. min. max. t plh , t phl propagation delay 1.65 ? 1.95 1.65 ? 4.3 0.18 ns 2.3 ? 2.7 0.14 3.0 ? 3.3 0.12 3.6 ? 4.3 0.12 t on turn-on time 1.65 ? 1.95 1.65 ? 4.3 v s = v cc r l = 50 ? c l = 30 pf 70 123 160 ns 2.3 ? 2.7 48 62 80 3?3.6 33 43 56 4.3 29 38 49 t off turn-off time 1.65 ? 1.95 1.65 ? 4.3 v s = v cc r l = 50 ? c l = 30 pf 36 45 60 ns 2.3 ? 2.7 35 47 62 3?3.6 30 40 51 4.3 29 38 50 t d break-before- make time delay 1.65 ? 1.95 1.65 ? 4.3 c l = 35 pf r l = 50 ? v s = v cc /2 10 42 ns 2.3 ? 2.7 10 22 3?3.6 5 15 4.3 5 12 q charge injection 1.65 ? 1.95 1.65 ? 4.3 c l = 1 nf v gen = 0 v 75 pc 2.3 ? 2.7 98 3.0?3.3 133 3.6?4.3 162
electrical characteristics STG4160 8/19 docid15013 rev 3 symbol parameter test conditions value unit v cc (v) v l (v) t a = 25 c -40 to 85 c min. typ. max. min. max. oirr off-isolation (1) 1.65 ? 4.3 4.3 v s = 1 v rms f = 100 khz 77 db v s = 1 v rms f = 1 mhz 67 v s = 1 v rms f = 5 mhz 50 xtalk crosstalk 1.65 ? 4.3 4.3 v s = 1 v rms f = 100 khz 80 db v s = 1 v rms f = 1 mhz 67 v s = 1 v rms f = 5 mhz 50 thd total harmonic distortion 2.3 ? 4.3 4.3 r l = 600 ? c l = 50 pf v s = v cc f = 600 hz to 20 khz 0.01 % bw -3 db bandwidth (switch on) 1.65 ? 4.3 4.3 r l = 50 ? 50 mhz 1. off-isolation = 20 log 10 (v d /v s ), v d = output, v s = input to off switch. table 7. ac electrical characteristics (c l = 35 pf, r l = 50 ? , t r = t f ?? 5 ns) (continued) table 8. capacitive characteristics symbol parameter test conditions value unit v cc (v) v l (v) t a = 25 c -40 to 85 c min. typ. max. min. max. c sel control pin input capacitance 1.8 ? 4.3 1.8 ? 4.3 v l =v cc 30 pf c sn sn port capacitance 1.8?4.3 1.8?4.3 v l =v cc 94 pf c d d port capacitance when the switch is enabled 1.8? 4.3 1.8?4.3 v l =v cc 227 pf
docid15013 rev 3 9/19 STG4160 test circuits 5 test circuits figure 4. on-resistance figure 5. bandwidth , '6 9 &69 9 && 6 6 ,1 *1' *1' ' 9 6 &6 9 && 9 && 6 6 ,1 *1' ' 9 287 9 6
test circuits STG4160 10/19 docid15013 rev 3 figure 6. off-leakage figure 7. channel-to-channel crosstalk 9 66 9 && ,1 6 $ &6 ' 9 ' $ 9 && *1' 62)) , '2)) , &6 9 && 9 && 6 6 ,1 *1' ' 9 287 9 6
docid15013 rev 3 11/19 STG4160 test circuits figure 8. off-isolation figure 9. test circuit 1. c l = 5/35 pf or equivalent (i ncludes jig capacitance). 2. r l = 50 ?? or equivalent. 3. r t = z out of pulse generator (typically 50 ? ). *1' ,1 6 6 9 && 9 287 *1' 9 6 &6 9 && 6&9 38/6( *(1(5$725 '87 5 7 & / 5 /
test circuits STG4160 12/19 docid15013 rev 3 figure 10. break-before-make time delay figure 11. switching time and charge injection (v gen =0v, r gen =0 ? , r l =1m ? , c l = 100 pf) &6y *1' 9 && 9 ,1 9 6 6 6 ,1 ' 9 287 5 / & / &69 5 *(1 6 6 ,1 9 *(1 9 ,1 *1' 9 && ' 9 287 5 / & / &6y 9 && *1' 9 ,1 9 287 w 2)) w 21 figure 12. turn-on, turn-off delay time &69 6 6 ,1 9 ,1 *1' 9 && 9 287 ' 5 / & / &69 9 && *1' 9 ,1 9 287 w 2)) w 21
docid15013 rev 3 13/19 STG4160 package mechanical data 6 package mechanical data in order to meet environmental requirements, st offers these devices in different grades of ecopack ? packages, depending on their level of environmental compliance. ecopack specifications, grade definitions a nd product status are available at: www.st.com . ecopack is an st trademark. figure 13. flip chip 8 package outline 1. drawing is not to scale. ' i i 6( ( % $ 2e %277209,(: $ $ $ 6 fff& & ( ' 7239,(: h
package mechanical data STG4160 14/19 docid15013 rev 3 figure 14. flip chip 8 footprint table 9. flip chip 8 mechanical data symbol dimensions (mm) min. typ. max. a 0.535 0.58 0.625 a1 0.18 0.205 0.23 a2 0.355 0.375 0.395 b 0.215 0.255 0.295 d 1.85 1.9 1.95 d1 1.5 e 0.45 0.5 0.55 e 0.85 0.9 0.95 e1 0.45 0.5 0.55 se 0.25 f 0.19 0.2 0.21 ccc 0.08 $ % *5,'3/$&(0(17$5($
docid15013 rev 3 15/19 STG4160 package mechanical data figure 15. flip chip 8 tape and reel figure 16. tape orientation ? ? ? ? ? ? ? ?0$; ?0$; $ . % ? ? ? 86(5',5(&7,212))((' 'rwlghqwli\lqjexps$orfdwlrq
package mechanical data STG4160 16/19 docid15013 rev 3 figure 17. reel information $ 5(&<&/(/2*2 6(('(7$,/- 5 5 5 ? ? 5 ? 6&$/( 6(&7,21%% : : = : 6(('(7$,/. plq plq '(7$,/- 6&$/( 1rwhpdwhuldosurshuwlhv dqwlvwdwlfzklwhrueoxh frqgxfwlyheodfn '(7$,/. 6&$/( $ $ %% plq 7+58 7+58 6(&7,21$$
docid15013 rev 3 17/19 STG4160 package marking information 7 package marking information table 10. device topside marking information marking composition: flip chip 8 package face: top legend unmarkable surface marking composition field a - 53312 - b - 53313 - c - 53323 - d - 53314 - e - 53318 - f - 53319 - g - 53322 - dot standard st logo (0000093) eco level marking area additional information (max. char. allowed = 1) assembly year (y) assembly week (ww) $ % & '( )*
revision history STG4160 18/19 docid15013 rev 3 8 revision history table 11. document revision history date revision changes 11-sep-2008 1 initial release. 19-feb-2009 2 updated: i on values in table 6: dc specifications . 15-may-2013 3 slightly redrawn figure 3 to figure 15 and figure 17 . updated figure 16 (added ?dot identifying bump a1 location?). updated section 3: maximum ratings (added cross-references). corrected units in table 8 . updated section 6: package mechanical data (updated ecopack text). added section 7: package marking information . minor corrections throughout document.
docid15013 rev 3 19/19 STG4160 please read carefully: information in this document is provided solely in connection with st products. stmicroelectronics nv and its subsidiaries (?st ?) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described he rein at any time, without notice. all st products are sold pursuant to st?s terms and conditions of sale. purchasers are solely responsible for the choice, selection and use of the st products and services described herein, and st as sumes no liability whatsoever relating to the choice, selection or use of the st products and services described herein. no license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. i f any part of this document refers to any third party products or services it shall not be deemed a license grant by st for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoev er of such third party products or services or any intellectual property contained therein. unless otherwise set forth in st?s terms and conditions of sale st disclaims any express or implied warranty with respect to the use and/or sale of st products including without limitation implied warranties of merchantability, fitness for a parti cular purpose (and their equivalents under the laws of any jurisdiction), or infringement of any patent, copyright or other intellectual property right. st products are not authorized for use in weapons. nor are st products designed or authorized for use in: (a) safety critical applications such as life supporting, active implanted devices or systems with product functional safety requirements; (b) aeronautic applications; (c) automotive applications or environments, and/or (d) aerospace applications or environments. where st products are not designed for such use, the purchaser shall use products at purchaser?s sole risk, even if st has been informed in writing of such usage, unless a product is expressly designated by st as being intended for ?automotive, automotive safety or medical? industry domains according to st product design specifications. products formally escc, qml or jan qualified are deemed suitable for use in aerospace by the corresponding governmental agency. resale of st products with provisions different from the statements and/or technical features set forth in this document shall immediately void any warranty granted by st for the st product or service described herein and shall not create or extend in any manner whatsoev er, any liability of st. st and the st logo are trademarks or registered trademarks of st in various countries. information in this document supersedes and replaces all information previously supplied. the st logo is a registered trademark of stmicroelectronics. all other names are the property of their respective owners. ? 2013 stmicroelectronics - all rights reserved stmicroelectronics group of companies australia - belgium - brazil - canada - china - czech republic - finland - france - germany - hong kong - india - israel - ital y - japan - malaysia - malta - morocco - philippines - singapore - spain - sweden - switzerland - united kingdom - united states of america www.st.com

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